Struct MemoryWritePort

pub struct MemoryWritePort {
    pub addr: Value,
    pub data: Value,
    pub mask: Value,
    pub clock: ControlNet,
}

A synchronous memory write port.

Asynchronous memory write ports are not currently supported.

Fields

addr: Value

The write address, selecting which row(s) to write. The address is always counted in units of the port’s data width. Thus, if the port width is equal to the memory width, the address is equal to the row index. However, for wide ports, the address is implicitly shifted left by log2(port.data.len() / memory.width) bits to obtain the first row index.

The address can have any width. If the address is too short to address all memory rows, so be it — higher rows will be unreachable by this port.

Writes to out-of-bounds addresses do not modify the memory.

data: Value

The write data. The width must be a power-of-two multiple of the memory width.

mask: Value

The write mask. Must have the same width as data. On every active clock edge, a 1 enables writing to the memory for the given data bit, 0 prevents writing.

clock: ControlNet

Implementations

impl MemoryWritePort

pub fn wide_log2(&self, memory: &Memory) -> usize

pub fn visit(&self, f: impl FnMut(Net))

pub fn visit_mut(&mut self, f: impl FnMut(&mut Net))

Trait Implementations

impl Clone for MemoryWritePort

fn clone(&self) -> MemoryWritePort

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for MemoryWritePort

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Hash for MemoryWritePort

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for MemoryWritePort

fn eq(&self, other: &MemoryWritePort) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Eq for MemoryWritePort

impl StructuralPartialEq for MemoryWritePort